1. Field of the Invention
This specification relates to an electrophoretic display device, and particularly, to an electrophoretic display device capable of reducing power consumption by blocking a leakage current generated from a Power On Reset (POR) circuit which resets each driver Integrated Circuit (IC) at an initial period.
2. Background of the Invention
In general, an electrophoretic display device is an electronic information display device using a phenomenon that colloidal particles move to one polarity when a pair of electrodes to which voltages are applied are put into a colloidal solution. The electrophoretic display device exhibits characteristics such as wide viewing angle, high reflectivity, low power consumption and the like without using a backlight, and thus is spotlighted as an electronic device such as an electric paper and the like.
The electrophoretic display device includes an ElectroPhoretic Display (EPD) panel having a plurality of gate lines and data lines arranged in a matrix pattern to define pixels on intersecting points therebetween, a gate driver to drive each pixel via the respective gate line, a data driver to supply a data voltage to each pixel via the respective gate line, a timing controller to control those components, a power supply unit and the like.
The electrophoretic display device is provided with a Power On Reset (POR) circuit which senses power when the power is first applied in a power-off state to generate a reset signal for clearing remnant data within each driver to initiate an operation in a stable state and defining a driver initiation timing of each driver.
FIG. 1 is a schematic view showing a structure of a POR circuit provided in a driver of the related art electrophoretic display device.
As shown in FIG. 1, the POR circuit 2 is implemented as a passive device, and includes a first node N1 connected to a reset signal (RST) output end, a resistor R having one end to which a power supply voltage VCC is applied and connected to the first node N1, and a capacitor C having one end connected to the first node N1 and the other end connected to a second node N2.
A driver Integrated Circuit (IC) of the related art electrophoretic display device uses a signal generated from the POR circuit 2 as a control signal for another circuit. FIG. 1 exemplarily shows that the signal generated from the POR circuit 2 is applied as a control signal for a bias circuit or the like mounted in the driver IC.
Referring to FIG. 1, the POR circuit 2 is connected to a bias block 5 and a transistor TR as an active element via the second node N2. A control signal is applied to the bias block 5 as a voltage entered into the other end of the capacitor C is uniformly controlled from when a power supply voltage VCC applied to a gate of the transistor TR increases to exceed a threshold voltage Vth.
Here, the power supply voltage VCC is always applied to the gate of the transistor TR during a power-on period such that the transistor TR can normally operate immediately when a reset request comes from the exterior. Hence, after an image update period of the electrophoretic display device, the transistor TR is always kept in the turn-on state even at an image static period. Consequently, a leakage current continuously flows into a ground voltage (VSS) end in the bias block 5 as indicated with ‘a’.
The leakage current is generated by about 10 μA to 12 μA although it depends on the characteristic of the transistor TR. This may cause an increase in power consumption of the electrophoretic display device.